A memory controller, also referred to as memory chip controller (MCC) or a memory controller unit (MCU), is a digital circuit that manages the move of information going to and from a pc's predominant memory. When a memory controller is built-in into another chip, comparable to an integral a part of a microprocessor, it is usually known as an integrated memory controller (IMC). Memory controllers contain the logic necessary to read and write to dynamic random-entry memory (DRAM), and to provide the critical memory refresh and other features. Studying and writing to DRAM is carried out by selecting the row and column information addresses of the DRAM because the inputs to the multiplexer circuit, the place the demultiplexer on the DRAM makes use of the converted inputs to select the correct memory location and return the info, which is then passed back via a multiplexer to consolidate the data so as to scale back the required bus width for Memory Wave the operation. Memory controllers' bus widths vary from 8-bit in earlier techniques, to 512-bit in more complicated programs, where they're typically applied as four 64-bit simultaneous memory controllers operating in parallel, though some function with two 64-bit memory controllers getting used to entry a 128-bit memory device.

Some memory controllers, such as the one built-in into PowerQUICC II processors, embody error detection and correction hardware. Many trendy processors are also integrated memory management unit (MMU), which in many operating systems implements digital addressing. On early x86-32 processors, the MMU is integrated within the CPU, but the memory controller is often part of northbridge. Older Intel and PowerPC-based mostly computer systems have memory controller chips which are separate from the primary processor. Typically these are integrated into the northbridge of the computer, additionally generally referred to as a memory controller hub. Most fashionable desktop or workstation microprocessors use an integrated memory controller (IMC), together with microprocessors from Intel, AMD, and those built around the ARM architecture. Previous to K8 (circa 2003), AMD microprocessors had a memory controller carried out on their motherboard's northbridge. In K8 and later, AMD employed an integrated memory controller. Likewise, until Nehalem (circa 2008), Intel microprocessors used memory controllers applied on the motherboard's northbridge.

Nehalem and later switched to an integrated memory controller. Different examples of microprocessor architectures that use integrated memory controllers include NVIDIA's Fermi, IBM's POWER5, and Solar Microsystems's UltraSPARC T1. Whereas an built-in memory controller has the potential to increase the system's performance, corresponding to by lowering memory latency, it locks the microprocessor to a specific type (or varieties) of memory, forcing a redesign so as to help newer memory applied sciences. When DDR2 SDRAM was launched, AMD released new Athlon sixty four CPUs. These new fashions, with a DDR2 controller, use a special bodily socket (often known as Socket AM2), so that they will solely fit in motherboards designed for the new sort of RAM. When the memory controller will not be on-die, the identical CPU could also be put in on a brand new motherboard, with an up to date northbridge to make use of newer memory. Some microprocessors in the nineteen nineties, such as the DEC Alpha 21066 and HP PA-7300LC, had built-in memory controllers